nanoelectronics; random-access storage; electrostatics; electron traps; hole traps; hot carriers; semiconductor device models; nonvolatile discrete-trap memory products; MOSFET channel threshold voltage; localised charge electrostatic effects; dual bit memory cells; discrete trap memory cells; channel hot electron injection; written cell forward read; written cell reverse read; discrete storage layer effective charged portion; trapping sites; reverse-forward threshold voltage shift; nanocrystal memory bias conditions; 2D drift-diffusion model;
机译:通过调整基于纳米晶体的电荷陷阱闪存单元中的(ZrO_2)_(0.6)(SiO_2)_(0.4)电荷陷阱层的微结构演变来增强存储性能
机译:非易失性肖特基势垒多位电荷陷阱存储单元的读取操作和单元可扩展性
机译:增强双Pi-Gate电荷陷阱层闪存的两位性能
机译:具有离散陷阱的双位存储单元中局部电荷的静电效应
机译:高级电荷陷阱存储器:堆栈设计和电池特性。
机译:用于神经形状应用的突触操作的核心壳双栅纳米线纳米线陷阱记忆
机译:循环诱导的Intercell捕获电荷对3-D NAND闪存中的保留电荷损耗的影响