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Exploring Transistor Width Effect on Stress-induced Performance Improvement in PMOSFET with SiGe Source/Drain

机译：探索晶体管宽度效应对SiGe源极/漏极PMOSFET应力诱导性能的改善

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Stress distribution in the Si channel regions of SiGe source/drain PMOSFETs with various widths is studied by 3D simulations. The width dependence of performance improvement is analyzed via device simulations.

机译：通过3D模拟研究了各种宽度的SiGe源/漏PMOSFET的Si沟道区域中的应力分布。性能改善的宽度依赖性通过设备仿真进行了分析。

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《》|2005年|P.323-326|共4页
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Xin Wang; Huang; M.; Bowen; C.; Adam; L.; Singh; S.; Chiu; C.; Wu; J.;
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专利

1. Performance Improvement by Blanket Boron Implant in the Sigma-Shaped Trench Before the Embedded SiGe Source/Drain Formation for 28-nm PMOSFET [J] . Li Zhong-Hua, Li Run-Ling, Jiang Yu-Long, IEEE Electron Device Letters . 2020,第6期

机译：在嵌入式SiGe源/漏极形成之前，在Σ形沟槽中植入的橡皮布硼植入物的性能改进
2. High-Performance Ultrathin Body c-SiGe Channel FDSOI pMOSFETs Featuring SiGe Source and Drain: $V_{rm th}$ Tuning, Variability, Access Resistance, and Mobility Issues [J] . Villalon A., Le Royer C., Cristoloveanu S., Electron Devices, IEEE Transactions on . 2013,第5期

机译：具有SiGe源极和漏极的高性能超薄体c-SiGe沟道FDSOI pMOSFET：$ V_ {rm th} $调整，可变性，访问电阻和迁移率问题
3. High-Performance pMOSFETs with High Ge Fraction Strained SiGe-Heterostructure Channel and Ultrashallow Source/Drain Formed by Selective B-Doped SiGe CVD [J] . SHINOBU TAKEHIRO, MASAO SAKURABA, JUNICHI MUROTA, Electrical engineering in Japan . 2008,第3期

机译：高性能pMOSFET，具有高Ge分数应变的SiGe-异质结构沟道和通过选择B掺杂的SiGe CVD形成的超浅源极/漏极
4. Impact of source/drain silicon cap on FDSOI SiGe pMOSFET performance [C] . Augendre E., Maitrejean S., De Salvo B., IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference . 2015

机译：源极/漏极硅盖对FDSOI SiGe pMOSFET性能的影响
5. Schottky source/drain hydrogenated amorphous silicon thin film transistors for neuromorphic applications. [D] . Pratiwadi, Ramapriyan R. 2008

机译：用于神经形态应用的肖特基源极/漏极氢化非晶硅薄膜晶体管。
6. Integration of Highly Strained SiGe in Source and Drain with HK and MG for 22 nm Bulk PMOS Transistors [O] . Guilei Wang, Jun Luo, Changliang Qin, 2017

机译：用于22nm体PMOS晶体管的HK和MG集成了源极和漏极中的高应变SiGe
7. High Performance pMOSFETs with High Ge Fraction Strained SiGe-heterostructure-channel and Ultrashallow Source/Drain Formed by Selective B-Doped SiGe CVD [O] . Shinobu Takehiro, Masao Sakuraba, Junichi Murota, 2006

机译：具有高GE分数的高性能PMOSFET应变SiGE-异质结构 - 通过选择性B掺杂SiGE CVD形成的超肺源/漏极

Exploring Transistor Width Effect on Stress-induced Performance Improvement in PMOSFET with SiGe Source/Drain

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