Impact of source/drain silicon cap on FDSOI SiGe pMOSFET performance

机译：源极/漏极硅盖对FDSOI SiGe pMOSFET性能的影响

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This paper analyses the impact of 10nm Si cap layer for UTBB pFET eSiGe, with 35% Ge in channel and source/drain. For the first time, it is found that this Si cap can improve both access resistance and hole mobility in narrow structures.

机译：本文分析了utbb pfet eSige的10nm Si盖层的影响，频道和源/排水中的35％Ge。首次，发现该Si盖可以改善窄结构中的拆孔电阻和空穴移动性。

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《IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference》|2015年|1-3|共3页
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Augendre E.; Maitrejean S.; De Salvo B.; Grenouillet L.; Wacquez R.; Vinet M.; Faynot O.; Morin P.; Loubet N.; Liu Q.; Chafik F.; Pilorget S.; Lherron B.; Kothari H.; Mignot Y.; Escarabajal Y.; Allibert F.; Cheng K.; Doris B.;
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Ge-Si alloys; MOSFET; elemental semiconductors; hole mobility; semiconductor materials; silicon; silicon-on-insulator; FDSOI pMOSFET performance; SiGe-Si; UTBB pFET; access resistance; hole mobility; size 10 nm; source drain silicon cap; Logic gates; Performance evaluation; Silicon; Silicon germanium; Stress; Uniaxial strain; FDSOI; UTBB; embedded SiGe; silicon cap;

机译：Ge-Si合金; MOSFET;元素半导体;空穴迁移率;半导体材料;硅;绝缘体上硅; FDSOI pMOSFET性能; SiGe-Si; UTBB pFET;访问电阻;空穴迁移率;尺寸10 nm;源漏硅帽;逻辑门;性能评估;硅;硅锗;应力;单轴应变; FDSOI; UTBB;嵌入式SiGe;硅盖;

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专利

1. High-Performance Ultrathin Body c-SiGe Channel FDSOI pMOSFETs Featuring SiGe Source and Drain: $V_{rm th}$ Tuning, Variability, Access Resistance, and Mobility Issues [J] . Villalon A., Le Royer C., Cristoloveanu S., Electron Devices, IEEE Transactions on . 2013,第5期

机译：具有SiGe源极和漏极的高性能超薄体c-SiGe沟道FDSOI pMOSFET：$ V_ {rm th} $调整，可变性，访问电阻和迁移率问题
2. Impact of pattern dependency of SiGe layers grown selectively inn source/drain on the performance of 22 nm node pMOSFETs [J] . Wang Guilei, Moeen M., Abedin A., Solid-State Electronics . 2015,第DECa期

机译：在源极/漏极中选择性生长的SiGe层的图案依赖性对22 nm节点pMOSFET的性能的影响
3. High-Performance pMOSFETs with High Ge Fraction Strained SiGe-Heterostructure Channel and Ultrashallow Source/Drain Formed by Selective B-Doped SiGe CVD [J] . SHINOBU TAKEHIRO, MASAO SAKURABA, JUNICHI MUROTA, Electrical engineering in Japan . 2008,第3期

机译：高性能pMOSFET，具有高Ge分数应变的SiGe-异质结构沟道和通过选择B掺杂的SiGe CVD形成的超浅源极/漏极
4. Impact of source/drain silicon cap on FDSOI SiGe pMOSFET performance [C] . Augendre E., Maitrejean S., De Salvo B., IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference . 2015

机译：源/漏极硅帽对FDSOI SiGE PMOSFET性能的影响
5. Low resistivity contact methodologies for silicon, silicon germanium and silicon carbon source/drain junctions of nanoscale CMOS integrated circuits. [D] . Alptekin, Emre. 2009

机译：用于纳米级CMOS集成电路的硅，硅锗和硅碳源极/漏极结的低电阻率接触方法。
6. Study of a hysteresis window of FinFET and fully-depleted silicon-on-insulator (FDSOI) MOSFET with ferroelectric capacitor [O] . Chankeun Yoon, Seungjun Moon, Changhwan Shin -1

机译：FinFET和带铁电电容器的全耗尽绝缘体上硅（FDSOI）MOSFET的磁滞窗口研究
7. High Performance pMOSFETs with High Ge Fraction Strained SiGe-heterostructure-channel and Ultrashallow Source/Drain Formed by Selective B-Doped SiGe CVD [O] . Shinobu Takehiro, Masao Sakuraba, Junichi Murota, 2006

机译：具有高GE分数的高性能PMOSFET应变SiGE-异质结构 - 通过选择性B掺杂SiGE CVD形成的超肺源/漏极

Impact of source/drain silicon cap on FDSOI SiGe pMOSFET performance

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