Electronics manufacturers are pursuing miniaturization to cope with the electronic trend. In doing so, they are faced with a controversial phenomenon: shrinking the size of silicon chips, while adding more functions (the number of the inputs and outputs, l/Os). However, the IC component yield decreases with the increase of the I/Os, since the wirebonding process yield providing the interconnection for the l/Os, remains constant. The bottom line is the profit loss. Based on the diffusion theories behind the wirebonding and the effects of both thermal and kinetic energies on the behavior of materials, the authors will propose a model for a "robust" bond and an approach to obtaining that model in the wirebonding.
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