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Electrical Uniformity of Direct Silicon Bonded Wafer Interfaces

机译:直接硅键合晶圆界面的电均匀性

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This paper describes a series of electrical measurements and sample modifications that enabled the electrical properties of hybrid-orientation direct silicon bonded wafer interfaces to be determined. It is shown that the carrier transport across this near-surface (110)Si/(100)Si boundary is dictated by the defects present at the bond interface. These interface states are believed to pin the Fermi-level, producing a conduction barrier with a thermal activation energy E_a = 0.56eV. The defect band has been identified by deep-level transient spectroscopy and associated with the defect states typically observed in plastically deformed silicon. The carrier transport behavior across the bonding interface, as well as the observed interface trap levels are therefore attributed to the dislocation network present at the bonding interface. The spatial uniformity of the interface properties have been evaluated by TEM, electron-beam induced current microscopy, photoconductive decay and conduction measurements.
机译:本文描述了一系列的电学测量和样品修改,这些电学测量和样品修改使得能够确定混合取向的直接硅键合晶圆界面的电性能。结果表明,载流子跨此(110)Si /(100)Si边界的迁移是由键界面处的缺陷决定的。据信这些界面态固定了费米能级,从而产生了具有热激活能E_a = 0.56eV的传导势垒。缺陷带已通过深层瞬态光谱法鉴定,并与通常在塑性变形的硅中观察到的缺陷状态有关。因此,跨键合界面的载流子传输行为以及观察到的界面陷阱能级都归因于键合界面处的位错网络。界面特性的空间均匀性已通过TEM,电子束感应电流显微镜,光电导衰减和电导率测量进行了评估。

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