Security Implications of Crosstalk in Switching CMOS Gates

摘要

The energy dissipation associated with switching in CMOS logic gates can be used to classify the microprocessors activity. It is relatively easy to classify activity by the number of transitions, i.e. Hamming Distance (HD). In this paper we consider layout dependent phenomena, such as capacitive crosstalk to derive a more precise power model. We show that for an 8 bit data bus, crosstalk may improve detection performance from 2.5 bits (HD based detector) to theoretical 5.7 bits and simulated 5.0 bits (crosstalk based detector) of information pr sample. Thus we have shown that a layout specific phenomenon (capacitance) must be considered when analyzing security implications of power and electromagnetic side channels. A small case study has also been carried out that support our simulations/theoretical results.