Investigation of Advanced Via Plating Process for Via Interconnection Enhancement

摘要

Recently,requirements for packaging substrate are greatly increasing in the electronics industry. In these requirements,it is very important to enhance via interconnection for reliability enhancement of packaging substrate because via interconnection is directly concerned with electrical characteristic of packaging substrate. And the incorrect via interconnection is very often happened to packaging substrate manufacturing process. As the size of micro via hole makes smaller,electroless copper is insufficiently plated in via hole inside. Because of this insufficient plating in smaller micro via hole,it would be happened to the incorrect via interconnection and reliability problem. rnTo resolve this reliability problem and to enhance reliability of packaging substrate,advanced via plating process on micro via hole is executed by controlling of catalyst type and plating time. In this study,it is investigated to the relationship between copper plating using this plating process and electrical resistance of via interconnection. Reliability of via interconnection is evaluated with thermal shock test in liquid phase. And it is analyzed to the effect of advanced via plating in via fill plating. rnAs the results,it is confirmed that reliability of via interconnection is enhanced by executing advanced via plating process with plating condition of catalyst B type and plating time Ⅱ. As copper plating thickness plated with this plating process on via bottom domain is thicker,electrical resistance of via interconnection is lower and reliability of packaging substrate is enhanced. Also it is observed that micro via hole is stably plated with copper on via bottom domain using advanced via plating process. In thermal shock test,it is confirmed that reliability of via interconnection using advanced via plating process is satisfied with a less than 10% relative change in electrical resistance,until 1000 thermal cycle. In addition,it is found to the mechanism of advanced via plating process for enhancement of via interconnection. In conclusion,for the purpose of reliability enhancement of micro via interconnection,the optimum advanced via plating process is established by using catalyst B type and plating timeⅡ. Advanced via plating process is proposed to enhance conventional semi-additive plating process,in terms of reliability of packaging substrate.