Design Technology of High Linearity DAC for Large Array CMOS Image Sensor

摘要

This paper presents a high precision DAC with seamless switch technique for large array CMOS image sensor to calibrate column fixed pattern noise and black level. Through the deep analysis on non-ideal factor and error source of piecewise DAC in multichannel, the high precision seamless switch technique has been researched. The adaptive signal chain switch technique according to the high to low subsection is developed in this paper, so the seamless switch is realized, and the convert accuracy is boosted. A prototype high intrinsic DR and low column FPN CMOS image sensor chip consisting of 64M 4T active pixel sensor (APS) array was designed and fabricated in 55nm CMOS 1P4M standard process, 75dB intrinsic DR and 0.06% column-to-column fixed pattern noise are achieved.