H.264 FRACTIONAL MOTION ESTIMATION REFINEMENT: A REAL-TIME ANDLOW COMPLEXITY HARDWARE SOLUTION FOR HD SEQUENCES

摘要

The MPEG-4 AVC/H.264 video compression standard introducesa high motion estimation complexity. Quarter-pixel accuracy andvariable block size enhances compression performances, but increasecomputation requirements. We propose a low complexityVLSI design for variable block size fractional motion estimation ofhigh definition video sequences. Thanks to an improved datapath ahigh throughput is achieved with low logic resources. A completereal-time motion estimation application has been prototyped on aheterogeneous platform comprising a DSP and a FPGA. The systemachieves motion estimation of 720p sequences at 60 frames persecond.