Reduction of image placement errors in EPL masks

摘要

Minimizing mask-level distortions is critical to ensuring the success of electron projection lithography (EPL) in the sub-65-nm regime. Previous research has demonstrated the importance of controlling the stress in the patterned stencil membranes to minimize image placement distortions. Low-stress, 100-mm diameter EPL mask blanks have been patterned with a layout that simulates the effects of the cross-mask and intra-subfield pattern density gradients found in a realistic circuit design. Extensive IP measurements were made to illustrate how local subfield correction schemes can be used to reduce all mask-level distortions (regardless of pattern type) to less than 15 nm (3σ). Combining membrane stress control with the use of repeatable and identical reticle chucking is expected to reduce EPL mask-level distortions to the values that will be needed for the 65-nm design node.