Accurate Effective Width Extraction Methods for Sub-lOnm Multi-Gate MOSFETs through Capacitance Measurement

摘要

In this brief, methods to extract the effective width through gate to source /drain capacitance in Fin/GAA nMOS are presented. With a long channel (i.e. Lg > 100nm), the planar and various multi-gate devices are simulated and compared using the simple concept that the difference between the inversion capacitance of planar and other devices is proportional to the effective width. These methods are simple but powerful tool for monitoring the within-wafer-variation of Fin/GAA(Gate-All-Around)'s effective width using electrical parameters.