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Non-Contact Implant Dose and Energy Metrology for Advanced CMOS Low Energy Implants

机译:用于高级CMOS低能植入物的非接触式植入物剂量和能量计量

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Ultra Shallow Junctions are required to successfully improve device performance with scaling to have a better threshold voltage control, improve transistor performance, reduce CHC (Channel Hot Carrier) degradation and reduce parasitic capacitance. All these play an increasingly critical role as we move on to the 45 nm node and beyond to provide the required ac and dc device performance for CMOS devices. In the low energy implant regime, four point probe based sheet resistivity measurement becomes highly unreliable as does silicon damage based metrology systems used currently for advanced process control and monitoring. A non-contact metrology method is investigated based on leakage and tunneling currents in a non-conductive film that contains the implanted dose. These shallow implants damage the non-conductive film causing leakage paths to the silicon substrate. The implant damage is proportional to the dose and energy of the implanted species. Furthermore implanting the non-conductive film causes the top layers of the film to become conductive thus changing the electrical oxide thickness of this film. Excellent correlation was found among the implanted dose, energy to the equivalent oxide thickness. Results from controlled experiments indicate that this method has potential for use in low energy implanter qualification and ultra large scale integration process control and monitoring.
机译:需要超浅结,以通过缩放成功地改善器件性能,以具有更好的阈值电压控制,改善晶体管性能,减少CHC(沟道热载流子)退化并减小寄生电容。随着我们向45 nm节点发展,并为CMOS器件提供所需的交流和直流器件性能,所有这些都扮演着越来越重要的角色。在低能量注入方案中,基于四点探针的薄层电阻率测量变得高度不可靠,而当前用于高级过程控制和监视的基于硅损伤的计量系统也是如此。基于包含植入剂量的非导电膜中的漏电流和隧穿电流,研究了一种非接触计量方法。这些浅注入会损坏非导电膜,从而导致向硅衬底的泄漏路径。植入物的损害与植入物的剂量和能量成正比。此外,注入非导电膜使得该膜的顶层变为导电的,从而改变了该膜的电氧化物厚度。在注入剂量,能量与等效氧化物厚度之间发现极好的相关性。受控实验的结果表明,该方法具有用于低能量植入机认证以及超大规模集成过程控制和监视的潜力。

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