Bradley Department of Electrical and Computer Engineering, Center for Power ElectronicsSystems (CPES), Blacksburg,VA24061 USA e-mail: zchen07@vt.edu;
Department of Material Science and Engineering, Centerfor Power Electronics Systems (CPES), Virginia Polytechnic Institute and StateUniversity, Blacksburg, VA 24061 USA (e-mail: yiyingy@vt.edu).;
Bradley Department of Electrical and Computer Engineering, Center for Power ElectronicsSystems (CPES), Blacksburg,VA24061 USA dushan@vt.edu;
Department of Electrical Engineering, The Universityof Texas at Dallas, Dallas, TX 75080 USA (e-mail: k.raja@utdallas.edu).;
Bradley Department of Electrical and Computer Engineering, Center for Power ElectronicsSystems (CPES), Blacksburg,VA24061 USA kdtn@vt.edu;
Bradley Department of Electrical and Computer Engineering, Center for Power ElectronicsSystems (CPES), Blacksburg,VA24061 USA mattavelli@ieee.org;
Device characteristics; gate oxide stability; hightemperature packaging; SiC MOSFET;
机译:适用于高温,高频应用的1200V,60A SiC MOSFET多芯片相腿模块
机译:用于高温和高频应用的SIC多芯片阶段腿模块的开发
机译:基于相邻去耦概念的基于线键的多芯片相腿SiC MOSFET模块中的电压抑制
机译:用于高温,高频应用的1200 V,60-A SiC MOSFET多芯片阶段腿模块
机译:SIC CMOS技术的高温应用内存模块设计
机译:多芯片SIC MOSFET模块多物理仿真辅助光学测量的热阻抗表征
机译:用于多芯片功率模块的碳化硅mOsFET的并联连接