The Effect of Thermal Stress on High Density Packaging Integrated Circuits

摘要

The trend of electronics industry is toward advanced high density packaging technologies. The reliability of integrated circuits (ICs) which is significantly affected by thermal stress has become more essential as the packaging density increases. In this paper, an accelerated thermal reliability test method for evaluating the packaging reliability of ICs which includes hot step, cold step and rapid thermal cycling test is presented. The technology of FIMV (Force current measure voltage) was applied during the reliability test as an indicator of degradation of packaging property, which allowed the reliability performance of ICs to be assessed in real time. The experimental results showed that the thermal stress resulted in the degradation of interfacial adhesion of plastic packaging ICs. Because of the temperature changing during the rapid thermal test, the strain and stress due to the coefficient of thermal expansion (CTE) mismatch between the encapsulant and the adjacent materials could contribute to delamination or de-adhesion. In some cases it was directly linked to a failure if some severe defects occured because of delamination, such as wire bond lift-off or fracture. Crack in die attach adhesive based on the same failure mechanism was also found. Additionally, unwanted brittle Au-Al intermetallic compound was detected at the bond interface because of the effect of high temperature. The formation of the Au-Al intermetallic compound led to the increase of electrical resistance and the weakening of bond strength which resulted in bond lift-off finally. At last future research work in this field is suggested.