Analysis of Thermal Stresses in a Layered Circuit Board

摘要

When choosing materials for a printed circuit board (PCB), it appears that a common misconception is that the coefficients of thermal expansion should be matched as closely as possible to minimize the stresses. In this paper it is shown that this is not necessarily true. A one-dimensional thermal stress analysis is considered for a printed circuit board (PCB) with N layers. Bending is neglected and average axial normal stresses and shear stresses are accounted for. It is shown that the solution for the shear stresses between layers can be written in the form of a difference equation (recurrence relation). For the first example, a two-layer board is considered. The solution leads to a design guideline. If there is a shear stress design limit then based on this a plot can be made to choose the optimum ratio of CTEs for the layers depending upon whether the conduction heat flow q is zero or not and depending upon magnitude of temperature change.. If q = 0, then matching the coefficients of expansion α_1 and α_2 reduces the stress to zero. However if q is not zero at some times, then a choice of the CTE ratio α_/α_2 should be made to keep the stress between the design limits. For three or more layers with different properties a design optimization scheme can be used to choose values of the coefficients of thermal expansion.