首页> 外文会议>1st International Conference on Semiconductor Technology Vol.1, May 27-30, 2001, Shanghai, China >THE ELETRICAL CHARACTERISTICS OF W/WN_x/POLY SI_(1-x)GE_x AND THE MOSCAP STRUCTURES WITH W/WN_x/POLY SI_(1-x)GE_x GATES STACK
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THE ELETRICAL CHARACTERISTICS OF W/WN_x/POLY SI_(1-x)GE_x AND THE MOSCAP STRUCTURES WITH W/WN_x/POLY SI_(1-x)GE_x GATES STACK

机译:W / WN_x / POLY SI_(1-x)GE_x的电子特性和W / WN_x / POLY SI_(1-x)GE_x闸门堆栈的MOSCAP结构

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We investigated the electrical characteristics of W/WN_x/poly Si_(1-x)Ge_x and the MOSCAP structures with W/WN_x/poly Si_(1-x)Ge_x gates stack using 4-point probe, XRD, and TEM as well as C-V and I-V. The sheet resistance of W/WN_x/poly Si_(1-x)Ge_x films was decreased with the increase of the annealing temperature and increased with the increase of Ge content in the poly Si_(1-x)Ge_x films. The low frequency C-V measurements demonstrated that the flat band voltage of the W/ WN_x /poly Si_(1-x)Ge_x stack was lower than that of W/ WN_x /poly Si stack by 0.3V, and showed less gate-poly-depletion-effect than that of W/ WN_x /poly-Si gates due to the increase of dopant activation rate with the increase of Ge content in the poly Si_(1-x)Ge_x films. As Ge content in poly Si_(1-x)Ge_x increased, the QBD became higher.
机译:我们使用4点探针,XRD和TEM研究了W / WN_x / poly Si_(1-x)Ge_x的电学特性以及W / WN_x / poly Si_(1-x)Ge_x栅堆叠的MOSCAP结构简历和IV。 W / WN_x / poly Si_(1-x)Ge_x薄膜的薄膜电阻随着退火温度的升高而降低,并随着Ge Si含量的增加而增加。低频CV测量表明W / WN_x /多晶硅Si_(1-x)Ge_x叠层的平带电压比W / WN_x /多晶硅Si叠层的平带电压低0.3V,并且栅极-多晶硅耗尽更少与W / WN_x / poly-Si栅极相比,具有更大的效应,这是由于随着多晶硅Si_(1-x)Ge_x薄膜中Ge含量的增加,掺杂剂活化速率增加。随着多晶硅Si_(1-x)Ge_x中Ge含量的增加,QBD变得更高。

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