首页> 外国专利> Semiconductor device including top gate planar type thin-film transistor and top gate planar self-aligned type thin-film transistor

Semiconductor device including top gate planar type thin-film transistor and top gate planar self-aligned type thin-film transistor

机译:半导体器件包括顶闸平面型薄膜晶体管和顶闸平面自对准型薄膜晶体管

摘要

A semiconductor device includes an insulating substrate, a polysilicon layer formed on the insulating substrate, a first-gate-insulating layer formed on the polysilicon layer, a first metal layer formed on the first-gate-insulating layer, an oxide-semiconductor layer formed on the first-gate-insulating layer, a second-gate-insulating layer formed on the oxide-semiconductor layer, a second metal layer formed on the second-gate-insulating layer, a first insulating interlayer formed on the second metal layer, a third metal layer formed on the first insulating interlayer, a first top gate planar type thin film transistor in which the polysilicon layer serves as a channel and which has a source, a drain and a gate, and a second top gate planar self-aligned type thin film transistor in which the oxide-semiconductor layer serves as a channel and which has a source, a drain and a gate, wherein the gate of the first top gate planar type thin film transistor is made of a first metal layer, the gate of the second top gate planar self-aligned type thin film transistor is made of the second metal layer, the source and the drain of the first top gate planar type thin film transistor and the source and the drain of the second top gate planar self-aligned type thin film transistor are made of the third metal layer, and the source or the drain of the first top gate planar type thin film transistor and the gate of the second top gate planar self-aligned type thin film transistor are electrically connected to each other.
机译:一种半导体器件,包括:绝缘基板,形成于该绝缘基板上的多晶硅层,形成在多晶硅层上的第一栅绝缘层,形成在第一栅极绝缘层上的第一金属层,氧化物半导体层形成的第一栅极绝缘层上,形成在氧化物半导体层上的第二栅绝缘层,形成在第二栅极绝缘层上的第二金属层,第一层间绝缘层形成在第二金属层,一个形成在第一层间绝缘层的第三金属层,第一顶栅平面型薄膜晶体管,其中所述多晶硅层用作沟道并且具有源极,漏极和栅极,和第二顶栅平面自对准型其中氧化物半导体层用作沟道和薄膜晶体管具有源极,漏极和栅极,其特征在于,第一顶栅平面型薄膜晶体管的栅极由第一金属层,克吃第二顶栅平面自对准型薄膜晶体管是由第二金属层,源极和第一顶栅平面型薄膜晶体管的漏极和源极和第二顶栅平面自的漏极的-aligned型薄膜晶体管是由所述第三金属层,并且所述源极或所述第一顶栅平面型薄膜晶体管的漏极和晶体管电连接到第二顶栅平面自对准型薄膜的栅极彼此。

著录项

  • 公开/公告号US11227879B2

    专利类型

  • 公开/公告日2022-01-18

    原文格式PDF

  • 申请/专利权人 TIANMA MICROELECTRONICS CO. LTD.;

    申请/专利号US202016947696

  • 发明设计人 KAZUSHIGE TAKECHI;

    申请日2020-08-13

  • 分类号H01L27/12;H01L27/32;

  • 国家 US

  • 入库时间 2022-08-24 23:23:03

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