首页> 外国专利> Merged PiN Schottky (MPS) Diode With Multiple Cell Designs And Manufacturing Method Thereof

Merged PiN Schottky (MPS) Diode With Multiple Cell Designs And Manufacturing Method Thereof

机译:合并PIN肖特基(MPS)二极管,具有多个电池设计及其制造方法

摘要

A semiconductor device may include a substrate having a first conductivity type; an epitaxial layer having the first conductivity type deposited on one side of the substrate; a plurality of regions having a second conductivity type formed under a top surface of the epitaxial layer; a first Ohmic metal patterned and deposited on top of the regions with the second conductivity type; a Schottky contact metal deposited on top of the entire epitaxial layer to form a Schottky junction; and a second Ohmic metal deposited on a backside of the substrate, wherein the regions include one or more wide regions, each having different widths that can be optimized to simultaneously obtain high surge current capability and preserve a low forward voltage drop and reverse leakage current.
机译:半导体器件可包括具有第一导电类型的基板; 具有沉积在基板的一侧的第一导电类型的外延层; 具有在外延层的顶表面下形成的第二导电类型的多个区域; 第一种欧姆金属图案化并沉积在具有第二导电类型的区域的顶部; 肖特基接触金属沉积在整个外延层的顶部,形成肖特基交界处; 和沉积在基板的背面的第二欧姆金属,其中区域包括一个或多个宽区域,每个区域具有不同的宽度,可以优化以同时获得高浪涌电流能力并保持低正向电压下降和反向漏电流。

著录项

  • 公开/公告号US2021328077A1

    专利类型

  • 公开/公告日2021-10-21

    原文格式PDF

  • 申请/专利权人 XIAOTIAN YU;ZHENG ZUO;RUIGANG LI;

    申请/专利号US202117235891

  • 发明设计人 XIAOTIAN YU;ZHENG ZUO;RUIGANG LI;

    申请日2021-04-20

  • 分类号H01L29/872;H01L29/16;H01L29/06;H01L29/45;H01L29/47;H01L21/04;H01L29/66;

  • 国家 US

  • 入库时间 2022-08-24 21:48:34

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