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Artificial neuron for neuromorphic chip with resistive synapses
Artificial neuron for neuromorphic chip with resistive synapses
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机译:具有电阻突触的神经形态芯片的人工神经元
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摘要
The invention relates to an artificial neuron for a neuromorphic chip comprising a resistive memory synapse representative of a synaptic weight. The artificial neuron consists of a read circuit and an integration circuit. The integration circuit (CI) comprises a synaptic weight accumulator (ACC) at the terminals of which a membrane voltage (Vmem) is established and a comparator configured to emit a postsynaptic pulse if a threshold is crossed by the voltage membrane. The readout circuit (CL) is configured to impose on the synapse a readout voltage independent of the membrane voltage and to provide the integration circuit with an analog quantity representative of the synaptic weight (PSa). Figure for the abstract: Figure 5
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