首页>
外国专利>
On-die circuitry for electrostatic discharge protection (ESD) analysis
On-die circuitry for electrostatic discharge protection (ESD) analysis
展开▼
机译:用于静电放电保护(ESD)分析的模具电路
展开▼
页面导航
摘要
著录项
相似文献
摘要
Some embodiments include apparatuses having an electrostatic discharge (ESD) protection circuit coupled to a node, and first, second, and third circuits coupled to the node. The first circuit includes a first charge pump to cause a voltage at the node during activation of the first circuit to change from a first voltage value to a second voltage value within first multiple periods of a clock signal, the second voltage value being less than the first voltage value. The second includes a second charge pump to cause a voltage at the node during activation of the second circuit to change from a third voltage value to a fourth voltage value during second multiple periods of the clock signal, the fourth voltage value being greater than the third voltage value. The third circuit generates information based on the values of the voltage at the node during activation of the first and second circuits. The apparatuses optionally include a fourth circuit to generate an additional voltage at an additional node. The additional voltage has a negative voltage value. The additional node is coupled to a gate of at least one transistor of the first circuit.
展开▼