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Apparatus of the logic calculation circuits having magnetic cores

机译:具有磁芯的逻辑计算电路的装置

摘要

936,127. Circuits employing bi-stable magnetic elements. KOBUSAI DENSHIN DENWA KABUSHIKI KAISHA. March 23, 1961 [March 23, 1960; April 16, 1960; July 30, 1960 (3); Oct. 10, 1960], No. 10662/61. Class 40 (9). In a circuit for performing logical operations, the two cores of a pair of magnetic cores are first set to opposite polarities by a current in a setting winding S, Fig. 1c, and are subsequently fed simultaneously over separate windings with (a) a bias signal on windings W sufficient only to bring back the induction in each core to zero, (b) a constant signal on windings Nc and (c) one or more binary signals on windings N 1 , N 2 , N 3 , &c. representing information on which the logical operation is to be performed. The intensity of the constant signal is an odd number of times the intensity of a signal on winding N 1 , N 2 , &c. The cores are read by a current applied through terminals +R,- R to split output windings N 0 , rectifiers D 1 , D 2 or other gates ensuring that the output windings present a high impedance during a writing operation. The output appears as a current I 1 or I 2 on terminal X or #X. In Fig. 6, the reading current Ir in element x appears as I 1 and terminal X or as I 2 at terminal X according to the digit stored. Only I 1 is used to control element y. As shown, the constant current Ic in windings NC is in a negative direction so that a signal current I 1 on terminal X produces an output current at Y when element y is read. Logical sum.-Two elements x, y, Fig. 12a, like the element shown in Fig. 6, feed a third element z. Windings N 1 , N 2 are connected to the X terminal of x and the #Y terminal of y and the circuit gives an output in response to X or Y or both. The constant signal Ic is half the signal current and is positive. Logical product.-If the constant signal of Fig. 12a is reversed the circuit gives an output only in response to X and Y. Other logical combinations of x, x, y, #y can be derived by arrangement of the directions of the windings N 1 , N 2 , Ic or by adding a further input element z. The circuit shown in Fig. 13 derives u in the equation Driving circuits.-The read circuits of a number of circuit elements 1, 2, &c., Fig. 15, are connected in series to a transformer T 3 or T 4 . A resistance capacity arrangement R, C gives the current source a high impedance as seen from the circuit elements 1, 2, &c. The constant current signals may be provided by a similar circuit (Fig. 16, not shown), in which the R, C circuit are replaced by rectifiers.
机译:936,127。采用双稳态磁性元件的电路。 KOBUSAI DENSHIN DENWA KABUSHIKI KAISHA。 1961年3月23日[1960年3月23日; 1960年4月16日; 1960年7月30日(3); [1960年10月10日],第10662/61号。 40级(9)。在用于执行逻辑运算的电路中,首先通过设置绕组S中的电流将一对磁芯中的两个芯设置为相反的极性(图1c),然后同时在具有(a)偏压的独立绕组上同时供电绕组W上的信号仅足以使每个铁心中的感应恢​​复为零,(b)绕组Nc上的恒定信号,以及(c)绕组N 1,N 2,N 3,...和c上的一个或多个二进制信号。表示要对其执行逻辑操作的信息。恒定信号的强度是绕组N 1,N 2,&c上信号强度的奇数倍。通过通过端子+ R,-R施加到分流输出绕组N 0,整流器D 1,D 2或其他栅极的电流读取铁心,以确保在写操作期间输出绕组呈现高阻抗。输出在端子X或#X上显示为电流I 1或I 2。在图6中,根据所存储的数字,元件x中的读取电流Ir显示为I 1和端子X,或者显示为端子2的I 2。仅I 1用于控制元素y。如图所示,绕组NC中的恒定电流Ic处于负方向,因此当读取元素y时,端子X上的信号电流I 1在Y处产生输出电流。逻辑求和-与图6中所示的元素一样,图12a中的两个元素x,y馈入第三元素z。绕组N 1,N 2连接到x的X端子和y的#Y端子,并且电路响应X或Y或两者给出输出。恒定信号Ic为信号电流的一半,为正。逻辑乘积-如果将图12a的恒定信号取反,则电路仅响应于X和Y给出输出。x,x,y,#y的其他逻辑组合可以通过绕组方向的排列得出N 1,N 2,Ic或添加另一个输入元素z。图13中所示的电路在等式驱动电路中得出u。-图15中的多个电路元件1、2等的读取电路串联连接到变压器T 3或T 4。从电路元件1、2,&c所见,电阻电容装置R,C使电流源具有高阻抗。恒定电流信号可以由类似的电路(图16,未示出)提供,其中R,C电路被整流器代替。

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