SIGNAL OVERLOAD COMPENSATION CIRCUIT FOR ANTENNA TUNING SYSTEM

摘要

1,267,907. Tuning radio receivers; A.G.G. in transistor circuits. MOTOROLA Inc. 30 April, 1970 [15 May, 1969], No. 20914/70. Headings H3Q and H3T. In a wave signal receiver having a voltage variable reactance 41 in series between the antenna 9 and an R.F. amplifier 12, a signal level overload compensation circuit for the voltage-variable reactance has a frequency and voltage-variable impedance 40, 60 exhibiting increased impedance with increasing frequency of signals connected in series with the voltage variable reactance 41 and a control voltage derived from the output of the R.F. amplifier is fed to the variable impedance 40, 60 to further vary its impedance. The R.F. amplifier 12 includes a hyper-abrupt varactor diode 16 as may the oscillator 26 for tuning together with the voltage variable capacitor 41 by adjustment of a potentiometer 20, which may be in the receiver or remotely located. Capacitances 48 and 49 represent the antenna and cabling capacitances and capacitor 50 may be provided to tune the radio to the A.M. band. The input circuit to the R.F. amplifier 12 includes a series tuned L-C circuit 40, 41 and when the radio is used in a car a whip antenna 9 may be used. As the A.G.C. increases the transistor 12 conducts less and this increases the input impedance of transistor 12. As a result of this an increase in R.F. voltage drop is present across the emitter-base path of transistor 12 and the R.F. voltage across the varactor 41 does not increase in proportion to the increase in antenna voltage. The R.F. voltage across the varactor 41 is limited by this A.G.C. to a value below the value at which rectification or partial rectification by the varactor would occur. Also to increase the resistance in series with the varactor 41 to compensate for high frequencies a frequency responsive circuit is included comprising a secondary winding 60 and a field effect transistor 61. FET 61 is controlled so that for low signals the FET is high impedance and for high input signals the A.G.C. causes FET 61 to reduce its impedance and due to the coupling of winding 60 to inductor 40 this increases the resistance in series with the varactor 41 to compensate for the signal overload.