Error test circuit for binary data - uses rectifier stage to produce nRZ signal passed through two threshold test levels and output logic circuit giving error free signal

摘要

The error test circuit for binary data accepts a read signal (RO) which may include an interference signal (SI). The signal read in is transferred to an NRZ-type read circuit which produces a rectified output submitted to a selection circuit with an upper (URO) and a lower (URU) threshold value level. The selection circuit consists of two threshold value stages with outputs each sent to one of two registers. The latter is connected to a multiplexer, the common output line from which continues through a parity check unit in parallel with a summation unit; The final stages include a comparator and a flip-flop. These stages produce an error free output.