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Digital adder-subtractor circuit - has decimal display with 5 dual coded flip=flops per decade
Digital adder-subtractor circuit - has decimal display with 5 dual coded flip=flops per decade
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机译:数字加减法电路-具有十进制显示,每十年有5个双编码触发器
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摘要
An electronic adder and subtractor circuit in 8421 code with a decimal display has dual coded flip-flops with at least 5 flip-flops in each decade. The circuit is a combined adder-subtractor using the memory region 10 to 19 for the decades for the indication range 0 to 9. Alternatively, a memory region may be used lying significantly above the region of null. A decimal-binary converter enables the decimal numbers to be input as binary numbers. A decade is reset following the value exceeding the decade numeral 9 by subtracting the number 10. Following the value falling below 0 the decade is reset by the addition of 10. The corresp. carry pulses for the next decade are produced by the associated decoder circuit.
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