The counter comprises one or more count decades, each of which comprises four flip-flop stages. The blocking of the second and third flip-flop stages in each decade upon the count state changing from 0 to 9 is effected via an external potential and not by a clock pulse. Pref. each count decade use four A-type flip-flops, (1..4), only the first three of which have pre-adjustment feedback lines (p,q). Each flip-flop (1..4) is associated with a pair of AND gates (1a,1b....4a,4b). The flip-flops (1..4) have no third input and no extra clock input. The count decades can also use B-type or C-type flip-flops with four pairs of master/slave flip-flops per decade.
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