首页> 外国专利> Electronic 8421 code adder with decimal display - uses five flip=flop stages per decade with converter to provide decimal display connection

Electronic 8421 code adder with decimal display - uses five flip=flop stages per decade with converter to provide decimal display connection

机译:带有十进制显示的电子8421代码加法器-每十年使用五个触发器级,带转换器以提供十进制显示连接

摘要

An electronic adder circuit is designed to add numbers coded in 8421 code and includes a decimal display facility. Each adder circuit provides a decode capability with 5 flip-flops in order to have a capacity for the number 17. The decode adder consists of five flip-flops with the last stage not including an inverter stage. Each flip-flop is formed by a pair of cross-coupled transistors together with diodes and resistors. Inverter stages are provided by a pair of transistors together with a resistor. Carry-overs from a lower stage are introduced to the first stage and the second stage provides an input for a general reset.
机译:电子加法器电路设计为可对以8421码编码的数字进行加法运算,并包括一个十进制显示功能。每个加法器电路提供5个触发器的解码能力,以便具有数字17的容量。解码加法器由5个触发器组成,最后一级不包括反相器级。每个触发器由一对交叉耦合的晶体管以及二极管和电阻器组成。反相器级由一对晶体管和一个电阻提供。来自较低级的残留物被引入第一级,而第二级则为一般复位提供输入。

著录项

  • 公开/公告号DE3026149A1

    专利类型

  • 公开/公告日1982-02-04

    原文格式PDF

  • 申请/专利权人 MERKLEPAUL;

    申请/专利号DE19803026149

  • 发明设计人 MERKLEPAUL;

    申请日1980-07-10

  • 分类号G06F7/50;

  • 国家 DE

  • 入库时间 2022-08-22 12:43:15

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