CMOS circuit for binary addition of three variables - contains N-and P-channel transistors in identical circuits dispensing with complements of the variables

摘要

A variable signal controls n channel transistors while a second signal controls transistors in a summing and carry forward circuit. Similarly a third signal controls other transistors in these same circuits. The same signals without their complements control p channel transistors (T1'-T4') in identical circuits. Two further transistors are controlled by the complement of the carry forward value while the secondary cells for the carry forward and sum valves are used as current limiters. The bistable effect between the impedances of the high elements in the p channel and the impedances of the low elements in the n channel allows a gate circuit to be dispensed with and allows all the transistors to be controlled by the same signals without requiring their complements.