首页> 外国专利> Data and clock recovery system having a phase-locked-loop and which controls dynamic loop response of a data stream of unknown data format

Data and clock recovery system having a phase-locked-loop and which controls dynamic loop response of a data stream of unknown data format

机译:具有锁相环并且控制未知数据格式的数据流的动态环路响应的数据和时钟恢复系统

摘要

A data and clock recovery system for capturing and processing serial data of a type wherein data bits of an unknown format are interleaved with clock bits utilizes a phase lock loop capable of being operated in a capture mode or a tracking mode. The data stream is compared with an internally generated reference signal, and error pulses having widths proportional to the phase error are generated. In the capture mode, these error pulses are differentially processed to produce a control voltage which varies the frequency of a VCO which in turn alters the reference frequency. In the tracking mode, phase error pulses of fixed widths are processed only if the data bits occur in fixed windows. Differential amplifying means provide adjustable gain control of the error pulses. Means are provided for digitally controlling the loop's dynamic response when switching between the capture and tracking modes.
机译:用于捕获和处理一种类型的串行数据的数据和时钟恢复系统,其中将未知格式的数据比特与时钟比特交织,利用了能够在捕获模式或跟踪模式下运行的锁相环。将数据流与内部产生的参考信号进行比较,并产生具有与相位误差成比例的宽度的误差脉冲。在捕获模式下,对这些误差脉冲进行差分处理以产生控制电压,该控制电压会改变VCO的频率,进而改变参考频率。在跟踪模式下,仅当数据位出现在固定窗口中时,才处理固定宽度的相位误差脉冲。差分放大装置提供误差脉冲的可调增益控制。当在捕获和跟踪模式之间切换时,提供了用于数字控制环路动态响应的装置。

著录项

  • 公开/公告号US4365210A

    专利类型

  • 公开/公告日1982-12-21

    原文格式PDF

  • 申请/专利权人 MOTOROLA INC.;

    申请/专利号US19800163380

  • 发明设计人 WAYNE D. HARRINGTON;STANLEY E. GROVES;

    申请日1980-06-26

  • 分类号H03L7/10;H03D3/18;

  • 国家 US

  • 入库时间 2022-08-22 09:52:20

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