DYNAMIC DEVICE ADDRESS ASSIGNMENT MECHANISM FOR A DATA PROCESSING SYSTEM

摘要

BC9-80-012ABSTRACTDYNAMIC DEVICE ADDRESS ASSIGNMENT MECHANISMFOR A DATA PROCESSING SYSTEMA peripheral device address assignment mechanismis described which does not require the use ofplugboards or jumpers. This mechanism enables ahost processor to select any desired peripheraldevice and set its device address to any desiredvalue at any desired time. This is accomplishedby providing each peripheral device control unitwith a loadable device address register for holdingthe device address assigned to its peripheraldevice. Each device control unit is furtherprovided with circuitry responsive to the appear-ance of a unique I/O command on the processor I/Obus and to the activation of a unique set of theI/O bus data lines by the processor for loadinginto its device address register the desireddevice address value as supplied thereto by theprocessor via the I/O bus.