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OFFSET/DRIFT CORRECTING CIRCUIT FOR ANALOG-DIGITAL CONVERTER

机译:模拟-数字转换器的偏移/漂移校正电路

摘要

PURPOSE:To correct an offset of an A/D converter to a desired value at all times by integrating an analog quantity corresponding to the least significant 1 bit of the A/D converting circuit outputted from a correction pulse generating circuit at each conversion to obtain an offset setting value. CONSTITUTION:A voltage difference between an analog voltage and a correction voltage given via switches 1, 2 is amplified 3, A/D-converted 4 sequentially and a desired offset value is set 5. A digital output value of the converter 4 is compared 6 with the offset setting value at the correction mode and a signal for polarity selection is outputted. Every time the converter 4 conducts A/D conversion, a correction pulse corresponding to analog quantity corresponding to the least significant 1 bit of the converter 4 is generated 7. The polarity of the pulse is selected by a signal of a polarity changeover circuit 8, an integration citcuit 9 integrates and holds the correction pulse and outputs it as a correction voltage.
机译:目的:通过在每次转换时积分从校正脉冲生成电路输出的A / D转换电路的最低有效1位对应的模拟量,以始终将A / D转换器的偏移校正为所需值,从而获得偏移量设定值。组成:通过开关1、2给出的模拟电压和校正电压之间的电压差被放大3,依次进行A / D转换4并设置所需的偏移值5。比较转换器4的数字输出值6在校正模式下具有偏移设置值,并且输出用于极性选择的信号。每当转换器4进行A / D转换时,产生与对应于转换器4的最低1位的模拟量相对应的校正脉冲。该脉冲的极性由极性转换电路8的信号选择。积分电路9对校正脉冲进行积分并保持,并将其作为校正电压输出。

著录项

  • 公开/公告号JPS6029025A

    专利类型

  • 公开/公告日1985-02-14

    原文格式PDF

  • 申请/专利权人 TOSHIBA KK;

    申请/专利号JP19830128247

  • 发明设计人 SHINODA YASUO;

    申请日1983-07-14

  • 分类号H03M1/10;H03M1/06;

  • 国家 JP

  • 入库时间 2022-08-22 08:32:14

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