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Multiplier method and network for the multiplication, modulo a binary number N, of two binary numbers X and Y

机译:用于对两个二进制数X和Y的二进制数N取模的乘法的乘法器方法和网络

摘要

1. A method of multiplying two binary numbers X and Y defined by digital signals and respectively called multiplicator and multiplicand modulo a binary number N, characterized in that it consists in performing a first multiplication of the multiplicator signal with the multiplicand signal by means of a first multiplier circuit (16), in performing a second multiplication of the result obtained at the output of the first multiplicator circuit with a digital signal defining the complement of the number N, by means of a second multiplier circuit (18), in performing a third multiplication of the integer part of the result obtained at the output of the second multiplier circuit (18) with a digital signal defining the number N by means of a third multiplier circuit (22), and in subtracting the result obtained at the output of the third multiplier circuit (22) from the result obtained at the output of the first multiplier circuit in order to obtain a digital signal R corresponding to the product modulo N of the multiplicator number X with the multiplicand number Y.
机译:1.一种将由数字信号定义的两个二进制数X和Y相乘的方法,分别称为乘数和被乘数以二进制数N为模,其特征在于,该方法包括通过乘数对乘数信号与被乘数进行第一次乘法。第一乘法器电路(16),通过第二乘法器电路(18)对在第一乘法器电路的输出处获得的结果与定义数字N的补码的数字信号进行第二乘法,通过第三乘法器电路(22),将在第二乘法器电路(18)的输出处获得的结果的整数部分与定义数字N的数字信号进行第三次乘法,然后减去在第三乘法器电路(22)从在第一乘法器电路的输出处获得的结果中获得对应于产品的数字信号R ct乘数X与被乘数Y的模N。

著录项

  • 公开/公告号EP0145533A1

    专利类型

  • 公开/公告日1985-06-19

    原文格式PDF

  • 申请/专利权人 THOMSON-CSF;

    申请/专利号EP19840402131

  • 发明设计人 DEVAUX DOMINIQUE;

    申请日1984-10-23

  • 分类号G06F7/52;

  • 国家 EP

  • 入库时间 2022-08-22 08:02:01

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