The logic gate circuit includes an emitter-grounded switching transistor and a pull-up circuit connected to a collector of the switching transistor. The switching transistor is cut when an input signal has a high level and is turned on when the input signal has a low level. A control MIS transistor is connected to a base of the switching transistor and is turned on and off in response to respective low and high levels, of the output terminal of the switching transistor. An input transistor is connected in series with the control MIS transistor and is turned on and off when the input signal is high and low, resepctively.
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