Logic gate is coincidence, triplet of logic gates and logic circuit sequential implementing this logic gate

摘要

P the invention relates to the fast programmable logic / p & & p & the logic gate according to the invention comprises two inverters mounted in parallel, constituted by a transistor 1, 3 and a saturable load 2, 4. The second inverter 34 is supplied through a transistor 6, the grid, connected to the drain is reunie to the drain 7 of the first inverter 12, which may have the further entrees 1, 9 (or function). A triplet of three logic gates montees in series 11, 12, 13 comprises a programming input c on the third gate 13, an output of the looping, and in the case of a sequence of triplets, entrees of looping back on the first gate 11 of the first triplet 11, 12, 13. A programmable logic circuit is obtained by a sequence of triplets mounted in series, all looped on the first gate 11 of the sequence. The programming is obtained by placing one or two entrees of programming at logic level 0.... / p & & p & application to the programmable frequency divider circuits, the ratios of a by a. / p