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FET with Fermi level pinning between channel and heavily doped semiconductor gate
FET with Fermi level pinning between channel and heavily doped semiconductor gate
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机译:在通道和重掺杂半导体栅极之间具有费米能级固定的FET
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摘要
Herein disclosed is a semiconductor device in which control means for carriers migrating in a first semiconductor includes an interface state layer lying on the first semiconductor and a second conductor layer lying on the interface state layer. The interface state layer has its Fermi level pinned to that of the second semiconductor layer. By thus constructing an FET or the semiconductor device, an inversion or accumulation layer can be easily formed in the interface merely by applying a voltage to the control means.
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