Process for the fabrication of a Schottky gate field-effect transistor having a submicron effective channel length

摘要

The invention relates to a process for the fabrication of a field- effect transistor as described in German Patent Application No. P 35 35 002.4, corresponding to U.S. application Ser. No. 06/914,540 comprises first covering a semiconductor member with a layer which forms the channel region and part of which is covered with a passivation layer. Impurities are implanted into the exposed regions of the semiconductor surface and form underneath the channel region highly doped source and drain regions. A surface layer of the passivation layer is then removed in a section adjacent to the source region and a gate electrode is formed on the thus exposed narrow area of the channel region.