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Semiconductor device with a planar junction and self-passivating termination

机译:具有平面结和自钝化终端的半导体器件

摘要

A semiconductor device with a planar junction and self- passivating termination includes: a silicon substrate of one type of conductivity; an epitaxial layer of a second type of conductivity which is opposite to the first type of conductivity, lying on the substrate, so as to form with it a planar PN junction; a first region, of the first type of conductivity, that delimits, in its interior, an active portion of the device and extends transversely, from the surface of the epitaxial layer to the substrate with a portion having a high concentration of impurities and, on the surface, in the epitaxial layer, with a portion having a low concentration of impurities; and another region immersed in the epitaxial layer and of the same type of conductivity, but with a higher concentration of impurities. The latter region and the top portion of the first region extend toward each other with progressively decreasing concentrations of impurities. The first region may consist of a thin surface zone diffused on the walls and on the bottom of a deep groove of the type normally made in mesa devices. However, unlike mesa devices of the prior art the device according to the present invention does not require a thick layer of dielectric material in contact with the junction and its electrical properties are therefore improved and more reliable.
机译:一种具有平面结和自钝化终端的半导体器件,包括:一种导电类型的硅衬底;与第一导电类型相反的第二导电类型的外延层,位于衬底上,并与之形成平面PN结;具有第一导电类型的第一区域在其内部界定器件的有源部分并从外延层的表面横向延伸至衬底,该区域具有高浓度的杂质,并且在外延层中,该表面的杂质浓度低。另一个区域浸在外延层中,且具有相同的导电类型,但杂质浓度较高。后面的区域和第一区域的顶部随着杂质浓度的逐渐降低而彼此靠近。第一区域可以由分散在通常在台面装置中制成的深槽的壁和底部上的薄表面区域组成。然而,与现有技术的台面器件不同,根据本发明的器件不需要与结接触的厚介电材料层,因此其电性能得以改善并且更加可靠。

著录项

  • 公开/公告号US4805004A

    专利类型

  • 公开/公告日1989-02-14

    原文格式PDF

  • 申请/专利权人 SGS MICROELETTRONICA SPA;

    申请/专利号US19860941622

  • 发明设计人 LUCIANO GANDOLFI;SALVATORE MUSUMECI;

    申请日1986-12-11

  • 分类号H01L29/36;H01L29/70;

  • 国家 US

  • 入库时间 2022-08-22 06:28:34

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