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INTEGRATED PACKAGE SINGLE BONDING SHELF MULTI-ROW WIRE BONDING FINGER LAYOUT

机译:集成式包装单键搁板多排电线键合手指布局

摘要

An integrated circuit assembly (l0) includes a bipolar VSLI die (l2) contained in a multilayer ceramic pin-grid array package (l4). A bonding shelf (l8) defined on a single ceramic layer contains an inner row (20) of bonding pads (26) and an outer row (22) of bonding pads (28). Bonding wires (30, 32) extend from bonding pads (34) on the die to the opposing pads on the inner and outer rows to provide an electrical interface between the die and the package. The inner and outer bonding pads are connected by metallized fingers to conductive pins (6l, 65) which provide a power and signal interface with an incorporating system. The inner pads include metallized vias (24) to metallized segments on a layer other than that on which the bonding shelf is defined. Thus, the metallized fingers including the inner row of pads can extend to the pins while passing above or below, rather than between, adjacent pads of the outer row. In this way, the pitch of the package bonding pads is effectively doubled without the misalignment, and resulting problems with shorted bonding wires, inherent when the rows are located on separated bonding shelves.
机译:集成电路组件(10)包括容纳在多层陶瓷针栅阵列封装(14)中的双极VSLI芯片(12)。限定在单个陶瓷层上的结合架(18)包括结合垫(26)的内排(20)和结合垫(28)的外排(22)。接合线(30、32)从管芯上的接合垫(34)延伸到内排和外排上的相对的垫,以在管芯和封装之间提供电接口。内键合焊盘和外键合焊盘通过金属化的指状件连接至导电针脚(6l,65),该导电针脚与合并系统提供电源和信号接口。内垫包括金属化的通孔(24),该金属化的通孔(24)到达除限定结合架的层之外的层上的金属化段。因此,包括内排焊盘的金属化指状物可以延伸到销,同时在外排的相邻焊盘上方或下方而不是在相邻焊盘之间通过。以此方式,封装键合焊盘的间距有效地加倍而没有未对准,并且导致当行位于分开的键合架上时固有的键合线短路的问题。

著录项

  • 公开/公告号JPH03779B2

    专利类型

  • 公开/公告日1991-01-08

    原文格式PDF

  • 申请/专利权人 FUEACHAIRUDO SEMIKONDAKUTA CORP;

    申请/专利号JP19870081301

  • 发明设计人 CHINNAN U;

    申请日1987-04-03

  • 分类号H01L21/60;H01L23/498;

  • 国家 JP

  • 入库时间 2022-08-22 05:59:47

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