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SUBSTRATE POTENTIAL GENERATING CIRCUIT OF SEMICONDUCTOR STORAGE DEVICE

机译:半导体存储装置的基极电位产生电路

摘要

PURPOSE:To obtain the substrate potential generating circuit of a semiconductor storage device which has a small variation in substrate potential and is low in power consumption. CONSTITUTION:A reference potential Vref and a substrate potential VBB are decided through a comparator circuit 2. When the difference between Vref and VBB is large, a main bias circuit 5 and an external clock synchronizing type bias circuit 7 are operated and make VBB close to Vref. Furthermore, when the difference between Vref and VBB is small, only a subbias circuit 6 is operated and VBB is held close to Vref without wasting excess power.
机译:用途:获得半导体存储器件的衬底电势发生电路,该电路的衬底电势变化小且功耗低。组成:参考电位Vref和衬底电位VBB是通过比较器电路2确定的。当Vref和VBB之间的差较大时,主偏置电路5和外部时钟同步型偏置电路7工作,并使VBB接近Vref。此外,当Vref和VBB之间的差很小时,仅操作子偏置电路6,并且VBB保持接近Vref而不浪费多余的功率。

著录项

  • 公开/公告号JPH04318393A

    专利类型

  • 公开/公告日1992-11-09

    原文格式PDF

  • 申请/专利权人 MITSUBISHI ELECTRIC CORP;

    申请/专利号JP19910115633

  • 发明设计人 FUKIAGE TAKAHIKO;

    申请日1991-04-17

  • 分类号H01L27/04;G11C11/407;G11C11/408;H01L21/822;

  • 国家 JP

  • 入库时间 2022-08-22 05:40:01

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