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Bit error rate measurement system - has PLL synthesiser coupled in loop to provide signals for data rate

机译:误码率测量系统-PLL合成器环路耦合以提供数据速率信号

摘要

The system has a PLL synthesiser (2) that has an output frequency that can be set within a range and is then frequency divided (3) to generate a required bit rate for transmission. A pattern generator (4) coupled to the computer provides a test signal with data works of a particular length. An encoder (5) converts the signals into a standard code format for output (6). Inputs (8) are received by a pulse processing stage (9) that allows the loop around the PLL synthesiser to be closed. A decoder (11) coupled to a comparator (12) allows the bit rate error to be determined. ADVANTAGE - Operation with various codes. Large frequency bandwidth.
机译:该系统具有PLL合成器(2),其输出频率可以设置在一定范围内,然后进行分频(3)以生成传输所需的比特率。连接到计算机的码型发生器(4)提供具有特定长度的数据功的测试信号。编码器(5)将信号转换为标准代码格式,以输出(6)。输入(8)由脉冲处理级(9)接收,脉冲处理级(9)允许闭合PLL合成器周围的环路。耦合到比较器(12)的解码器(11)允许确定比特率误差。优点-使用各种代码进行操作。大频率带宽。

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