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Bit error rate measurement system - has PLL synthesiser coupled in loop to provide signals for data rate
Bit error rate measurement system - has PLL synthesiser coupled in loop to provide signals for data rate
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机译:误码率测量系统-PLL合成器环路耦合以提供数据速率信号
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摘要
The system has a PLL synthesiser (2) that has an output frequency that can be set within a range and is then frequency divided (3) to generate a required bit rate for transmission. A pattern generator (4) coupled to the computer provides a test signal with data works of a particular length. An encoder (5) converts the signals into a standard code format for output (6). Inputs (8) are received by a pulse processing stage (9) that allows the loop around the PLL synthesiser to be closed. A decoder (11) coupled to a comparator (12) allows the bit rate error to be determined. ADVANTAGE - Operation with various codes. Large frequency bandwidth.
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