Analog arithmetic circuit that can perform multiplication division expansion and compression by using delta sigma modulator

摘要

An analog arithmetic circuit for executing multiplications, divisions, compressions, expansions and combinations thereof. The arithmetic circuit is provided with a &Dgr;&Sgr; modulator comprising an A/D converter and a first D/A converter, a second D/A converter for receiving the output from the &Dgr;&Sgr; modulator, and a low-pass filter which receives the output of the second D/A converter and outputs the result of an arithmetic operation. The arithmetic circuit can be fabricated in the form of a MOS LSI because it does not use a precise triangle waveform generator for pulse width modulation.