The encoder is particularly for high speed and high resolution flash analog-to-digital converters. The number of components is drastically reduced, error correction scheme extended, the conversion speed and reliability increased. A suitable error correction can be accomplished by changing content of the decoders. The encoder comprises a register for sampling and interim storage of the input code, and providing a plurality of section codes, a plurality of section decoders for converting the section codes into a first portion of the output code, and a selective circuit for selecting one of the section codes in response to the first portion of the output code and converting the selected section code into a section portion of the output code.
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