MEMORY BUILT-IN TYPE SEMICONDUCTOR INTEGRATED CIRCUIT AND LOGICAL DESIGN METHOD THEREFOR

摘要

PURPOSE: To accomplish a test circuit for a built-in memory with a smaller number of pieces of hardware. ;CONSTITUTION: Scan registers 2-2 are dispoed on the address input side of a built-in memory 1 buried in a semiconductor integrated circuit, scan registers 6-6 is disposed the data input side thereof, and these are connected in series in the order of address input - data input data output. In this arrangement, at the time of test operation mode, pattern data of M series are sequentially shifted and input, random data are written in all address spaces of a memory 1, and those data are read out.;COPYRIGHT: (C)1994,JPO&Japio