首页> 外国专利> Short-channel MOS-transistor and its fabrication method

Short-channel MOS-transistor and its fabrication method

机译:短沟道MOS晶体管及其制造方法

摘要

A short-channel MOS transistor contains doped regions (13, 16, 17) for source, channel and drain regions which are arranged in a vertical direction in a silicon substrate (11), with the source region arranged on the surface of the substrate. At least the source and channel regions are laterally bounded by insulation regions (14). Below the drain region (13), a buried layer (12) with corresponding doping is provided, on which a deeply extending connection region (15) extends laterally from the source, channel and drain regions. A gate dielectric (19) and gate electrode (110) are arranged on the surface of a trench (18) which runs essentially perpendicularly to the surface of the substrate (11) and reaches down as far as the drain region (13). The length of the channel is, in particular, equal to from 50 to 100 nm. IMAGE
机译:短沟道MOS晶体管包含用于源极,沟道和漏极区域的掺杂区域(13、16、17),其在垂直方向上布置在硅基板(11)中,并且源极区域布置在基板的表面上。至少源极和沟道区域在横向上由绝缘区域(14)界定。在漏极区(13)的下方,提供了具有相应掺杂的掩埋层(12),在其上深延伸的连接区(15)从源极,沟道和漏极区横向延伸。栅电介质(19)和栅电极(110)布置在沟槽(18)的表面上,该沟槽基本上垂直于衬底(11)的表面延伸并且向下延伸至漏极区(13)。通道的长度尤其等于50至100nm。 <图像>

著录项

  • 公开/公告号EP0617468A1

    专利类型

  • 公开/公告日1994-09-28

    原文格式PDF

  • 申请/专利权人 SIEMENS AKTIENGESELLSCHAFT;

    申请/专利号EP19940103191

  • 发明设计人 KLOSE HELMUT DR.;NEPPL FRANZ DR.;

    申请日1994-03-03

  • 分类号H01L29/784;H01L21/336;

  • 国家 EP

  • 入库时间 2022-08-22 04:38:34

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号