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Virtual memory unit utilizing set associative memory structure and state machine control sequencing with selective retry

机译:利用集合关联存储结构和状态机控制排序并有选择重试的虚拟存储单元

摘要

A virtual memory unit has a plurality of directory and buffer store levels for storing page descriptor information. The memory directories and a least recently used (LRU) device constructed from the same type of standard cache address directory part include parity error detection circuits. The virtual memory unit further includes a state machine for defining sequential states used in generating control signals for directing the memory unit's operation in translating virtual addresses into physical addresses. Programmable control circuits which generate the required input data and control signals applied to the directories and LRU device for reading and updating their contents further include the retry facilities which, in response to certain types of error situations, alter state machine sequencing to again try the virtual to physical address translation with a fresh copy and the LRU replacement operations in a way to improve robustness.
机译:虚拟存储单元具有多个目录和缓冲区存储级别,用于存储页面描述符信息。由相同类型的标准高速缓存地址目录部分构成的存储器目录和最近最少使用的(LRU)设备包括奇偶校验错误检测电路。虚拟存储单元还包括状态机,该状态机用于定义在生成控制信号中使用的顺序状态,该控制信号用于指导存储单元将虚拟地址转换为物理地址的操作。可编程控制电路产生所需的输入数据和施加到目录和LRU设备以读取和更新其内容的控制信号,还包括重试功能,该重试功能可响应某些类型的错误情况,更改状态机顺序以再次尝试虚拟使用新副本和LRU替换操作进行物理地址转换,以提高鲁棒性。

著录项

  • 公开/公告号US5283876A

    专利类型

  • 公开/公告日1994-02-01

    原文格式PDF

  • 申请/专利权人 BULL HN INFORMATION SYSTEMS INC.;

    申请/专利号US19900593825

  • 发明设计人 STEVEN A. TAGUE;

    申请日1990-10-05

  • 分类号G06F12/08;G06F12/02;

  • 国家 US

  • 入库时间 2022-08-22 04:32:15

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