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Method of constructing a reduced size highly integrated static random access memory with double vertical channel structure

机译:具有双垂直通道结构的减小尺寸的高度集成的静态随机存取存储器的构造方法

摘要

A static random access memory with a double vertical channel structure capable of providing a highly integrated memory element and a method of the same. On a substrate of a first conductivity type, first and second layers of the same conductivity type are formed, in order. On respective surfaces of the three layers, impurity diffusion regions are formed, centers of which are located on a vertical line. The first layer having the second impurity diffusion region and the second layer having the third impurity diffusion region are removed at their center portions, except for their opposite side portions, thereby forming trenches. In these trenches, gate electrodes and a ground electrode are formed. Accordingly, the first impurity diffusion region and the remaining opposite side portions of second and third impurity diffusion regions become source/drain regions, while the remaining opposite side portions of first and second layers become a double vertical channel region.
机译:具有能够提供高度集成的存储元件的双垂直通道结构的静态随机存取存储器及其方法。在第一导电类型的基板上,依次形成相同导电类型的第一和第二层。在三层的各个表面上,形成杂质扩散区域,其中心位于垂直线上。在具有第二杂质扩散区域的第一层和具有第三杂质扩散区域的第二层中,除了它们的相对侧部之外,在它们的中央部分被去除,从而形成沟槽。在这些沟槽中,形成栅电极和接地电极。因此,第一杂质扩散区和第二杂质扩散区和第三杂质扩散区的其余相对侧部分成为源/漏区,而第一层和第二层的其余相对侧的剩余部分变为双垂直沟道区。

著录项

  • 公开/公告号US5330927A

    专利类型

  • 公开/公告日1994-07-19

    原文格式PDF

  • 申请/专利权人 GOLDSTAR ELECTRON CO. LTD.;

    申请/专利号US19920878549

  • 发明设计人 YONG H. LEE;

    申请日1992-05-05

  • 分类号H01L21/70;H01L27/00;

  • 国家 US

  • 入库时间 2022-08-22 04:31:25

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