LOW-VOLTAGE ERASABLE SPLIT-GATE FLASH PROGRAMMABLE READ ONLY MEMORY CELL AND ARRAY

摘要

PURPOSE: To enable erasure at a low voltage by providing a control gate having a portion serially provided between a program portion of a floating gate and a source, and providing the floating gate with an erasure portion extending from the program portion around a channel end portion to the source. ;CONSTITUTION: An erasure portion 34b of a floating gate 34 extends to a position around the lower end of a channel 22 on a field oxide insulating member 16, and overlaps with a source 18. A polysilicon control gate 38 has a split structure including a first portion 38a overlapping with the floating gate 34 and a program region 22a of the channel 22. A second portion 38b overlaps with a gap region of the channel 22, and is serially provided between the program portion 34a of the floating gate 34 and the source 18. The erasion is performed at a low voltage by causing Fowler Nordheim tunnel effect from an end portion 34c of the erasion portion 34b of the floating gate 34 through a lower tunnel oxide layer 32 to the source 18.;COPYRIGHT: (C)1995,JPO