首页> 外国专利> Semiconductor device having fine conductive lines, method of forming fine conductive lines, and method of manufacturing semiconductor device using the same

Semiconductor device having fine conductive lines, method of forming fine conductive lines, and method of manufacturing semiconductor device using the same

机译:具有细导线的半导体装置,细导线的形成方法以及使用该细线的半导体装置的制造方法

摘要

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a method of forming a line for use in a semiconductor device with a fine width, a process for manufacturing a semiconductor memory device using the method, and a semiconductor memory device formed by the method. Wherein the step of forming the insulating layer is performed by using the stepter at a position smaller than the width limit of the stepper of the stepper,; Forming a conductive layer on the entire surface to form a spacer on the sidewall of the patterned insulating layer and etching back to form a conductive sidewall spacer; And a step of etching and removing the insulating layer trench formed in the spacer to form a fine conductive line corresponding to a width of the sidewall spacer and forming a source drain region by forming the conductive line as a gate electrode, Thereby forming a capacitor connected to the element to form a semiconductor memory device.
机译:技术领域[0001]本发明涉及一种形成用于具有细宽度的半导体器件的线的方法,使用该方法制造半导体存储器件的方法以及一种半导体。该方法形成的存储器件。其中,形成绝缘层的步骤是在小于所述步进器的步进器的宽度极限的位置上使用所述步进器来进行的;在整个表面上形成导电层以在图案化绝缘层的侧壁上形成间隔物,然后回蚀以形成导电侧壁间隔物;以及蚀刻和去除形成在间隔物中的绝缘层沟槽以形成与侧壁间隔物的宽度相对应的细导线并通过将导电线形成为栅电极来形成源漏区的步骤,从而形成连接的电容器元件形成半导体存储器件。

著录项

  • 公开/公告号KR950021607A

    专利类型

  • 公开/公告日1995-07-26

    原文格式PDF

  • 申请/专利权人 문정환;

    申请/专利号KR19930026229

  • 发明设计人 최종무;

    申请日1993-12-02

  • 分类号H01L27/108;

  • 国家 KR

  • 入库时间 2022-08-22 04:10:58

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