Integrated CMOS semiconductor circuit and data processing system with integrated CMOS semiconductor circuit

摘要

PCT No. PCT/DE93/00443 Sec. 371 Date Jul. 17, 1995 Sec. 102(e) Date Jul. 17, 1995 PCT Filed May 21, 1993 PCT Pub. No. WO94/01890 PCT Pub. Date Jan. 20, 1994An integrated semiconductor circuit for reducing power consumption, employing CMOS technology in which a transistor pair can be operated stably at different supply voltages. At each supply voltage the transistors have an associated threshold voltage which can be set via the well and substrate bias voltages. The substrate of the transistor pair is connected to a substrate bias voltage generator circuit and the well is connected to a well bias voltage generator circuit. An input signal representing the level of the supply voltage sets the respective bias voltages corresponding to the level of the supply voltage. Thus, the threshold voltage of each transistor is adapted to the existing supply voltage, thereby ensuring stable operation of the transistor pair. A battery driven data processing system with the integrated semiconductor circuit can attain an approximate 100 fold extension of the operating time of the battery.