首页> 外国专利> Method for performing data communication between processes in the microcomputer, and the network and a plurality of microcomputers

Method for performing data communication between processes in the microcomputer, and the network and a plurality of microcomputers

机译:用于在微计算机中的进程之间进行数据通信的方法以及网络和多个微计算机

摘要

A programmable, high speed, single chip microcomputer includes 4K of RAM, ROM, registers and an ALU. Program can be stored in the on- chip RAM. The first local variable of each process to be executed is a workspace pointer (WPTR), and each process has a respective workspace identified by its WPTR. For each process, addressing of other variables is relative to the current WPTR, which is stored in a workpiece pointer register (WPTR REG). Instructions are constant bit size, having a function portion and a data portion loaded, respectively, into an instruction buffer (IB) and an operand register (OREGTR). Memory address locations are formed by combining the contents of the workspace pointer register and the operand register, or the contents of the A Register and the operand register. A set of "direct functions" obtains data from OREG. "Indirect functions" use the OREG contents to identify other functions, obtaining data from registers other than the operand register. A "prefixing" function (PFIX) develops operands having long bit lengths. Scheduling and descheduling of processes are achieved by forming a linked list within the several workspaces for the active processes. Each workspace identifies the workspace pointer of the next process to be executed. Each workspace contains in memory the identification of the next instruction to be executed for that respective process. A "last pointer" register (LPTR REG. ) cooperates in the scheduling operations. Each microcomputer chip can be coupled serially to other such chips on a respective pair of only two wires, each a unidirectional channel. Each channel also has two registers, one for process identification and one for data. Communications are synchronized.
机译:一种可编程的高速单片机,包括4K RAM,ROM,寄存器和ALU。程序可以存储在片上RAM中。每个要执行的进程的第一个局部变量是工作空间指针(WPTR),并且每个进程都有一个由其WPTR标识的工作空间。对于每个过程,其他变量的寻址都相对于当前WPTR,后者存储在工件指针寄存器(WPTR REG)中。指令是恒定的位大小,其功能部分和数据部分分别加载到指令缓冲区(IB)和操作数寄存器(OREGTR)中。通过组合工作空间指针寄存器和操作数寄存器的内容,或A寄存器和操作数寄存器的内容来形成存储器地址位置。一组“直接函数”从OREG获取数据。 “间接功能”使用OREG内容来标识其他功能,并从操作数寄存器以外的寄存器中获取数据。 “前缀”功能(PFIX)开发具有长位长度的操作数。流程的调度和调度是通过在活动流程的几个工作空间中形成一个链表来实现的。每个工作空间标识下一个要执行的进程的工作空间指针。每个工作空间在内存中包含要为该相应过程执行的下一条指令的标识。 “最后一个指针”寄存器(LPTR REG。)在调度操作中协作。每个微计算机芯片可以在仅两条电线的相应对上串行地耦合到其他这样的芯片,每条电线是单向通道。每个通道还具有两个寄存器,一个用于过程识别,一个用于数据。通信已同步。

著录项

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号