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Electrostatic Discharge (ESD) Protection Device with Heterojunction Structure

机译:具有异质结结构的静电放电(ESD)保护装置

摘要

An NMOS transistor having a source, a drain, and a gate formed in a semiconductor substrate, wherein a material layer having a potential lower than that of the silicon substrate in the silicon substrate between the source and the drain is provided. Device.;According to the present invention, a parasitic bipolar transistor formed of a source substrate drain is quickly driven to form a path through which an overcurrent flows, in a substrate. Thus, the overcurrent is prevented from flowing into the chip, and the chip is protected from the overcurrent generated by the ESD.
机译:一种NMOS晶体管,具有在半导体衬底中形成的源极,漏极和栅极,其中,提供在源极和漏极之间具有比硅衬底中的硅衬底的电位低的电位的材料层。根据本发明,由源极衬底漏极形成的寄生双极晶体管被快速驱动以在衬底中形成过电流流过的路径。因此,防止了过电流流入芯片,并且保护了芯片免受由ESD产生的过电流的影响。

著录项

  • 公开/公告号KR960030753A

    专利类型

  • 公开/公告日1996-08-17

    原文格式PDF

  • 申请/专利权人 김광호;

    申请/专利号KR19950000850

  • 发明设计人 최창훈;이상훈;박영관;김경호;

    申请日1995-01-19

  • 分类号H05F3/04;

  • 国家 KR

  • 入库时间 2022-08-22 03:44:37

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